Advisors: Tom Kazmierski
The project produced an n-bits picoMIPS architecture processor for the affine transformation of graphic pixels and was implemented on an Altera FPGA development board with minimal logic resources.
Advisors: Tom Kazmierski
The project produced an n-bits picoMIPS architecture processor for the affine transformation of graphic pixels and was implemented on an Altera FPGA development board with minimal logic resources.
Advisors: Tom Kazmierski, Michail Pligouroudis This project implemented the synthesis of FFT butterfly operations on an Altera FPGA development board. In this project, Modelsim software was successfully used for simulation and waveform graph analysis, and Quartus software was successfully used for system synthesis. This design was tested on an FPGA development board and the expected results were...
Advisors: Zhipeng Wang
This project includes process flow design, wafer cleaning, oxidation process lab, lithography process lab, boron predispersion process lab, boron re-dispersion process lab, parameter analysis and other experimental operations to optimise preferences for semiconductor material manufacturing, microelectronic device or integrated circuit design and manufacturing.
Advisors: Andrew, Zhipeng Wang
Used Cadence Virtuoso in the Linux system to design and draw the circuit, generate and analyze the circuit schematic diagram, complete the simulation of the MOS IV curve, and implement the circuit simulation and layout design of the CMOS inverter, the frequency converter, the simple voltage amplifier, and the differential amplifier.
Advisors: Xi Zhou, Fang Lei, Liangbo Xie
• Fully utilized FPGA’s excellent computing power to store big data by application of the stack principle and then analyzed and sorted the calculation results
• Reduced the code size through simple and effective instruction programming and worked out a solution implemented by FPGA for operating multiple stack elements in a single cycle.