Abstract: The globalisation of supply chains and manufacturing processes can lead to loss of control over the manufacturing process and exposure to potentially malicious third parties, thus making the security of Convolutional Neural Network hardware accelerators compromised by emerging attacks (e.g., hardware Trojan(HT) insertion attacks and backdoor attacks from third-party dataset providers)...
Performance and Security Enhancement Solutions for Positron Emission Tomography Medical Hardware
Abstract: Positron Emission Tomography (PET) is an emerging medical imaging methodology for diagnosing cancer. The optimization and security solutions surrounding this technology are essential issues in biomedical engineering. Low-resolution and unauthorized modification of medical images will affect clinical analysis and medical diagnostics. To improve image quality and security while minimizing...
Structural Design and Reliability Optimisation of MEMS Switches for High-temperature Operation
Advisors: Harold Chong [Postgraduate Graduation Design] This project investigates and designs the structure of MEMS switches suitable for harsh environments (high temperature) and uses COMSOL software to model and develop finite element analysis of electrostatic MEMS switches with different geometrical parameters and different materials at different operating temperatures. Based on the MEMS add...
SystemVerilog Design of an Application Specific Embedded Processor
Advisors: Tom Kazmierski
The project produced an n-bits picoMIPS architecture processor for the affine transformation of graphic pixels and was implemented on an Altera FPGA development board with minimal logic resources.
FPGA High-level Synthesis
Advisors: Tom Kazmierski, Michail Pligouroudis This project implemented the synthesis of FFT butterfly operations on an Altera FPGA development board. In this project, Modelsim software was successfully used for simulation and waveform graph analysis, and Quartus software was successfully used for system synthesis. This design was tested on an FPGA development board and the expected results were...